1. Lattice original design solution quality guarantee, ensure compatibility stability.
2. There is no need to install the driver separately, directly support Diamond/ispLever6.x/7.x/classic version, ispVM various versions.
3. Support lattice full range of FPGAs, such as SC/SCM/XP/XP2/EC/ECP2/ECP2M/MachXO/MachXO2 series.
4. Support lattice full range of CPLD, such as 1000/2000/4000 series.
5. USB standard interface, using a standard USB cable to connect to a PC.
6. USB power supply, no external power supply support.
7, interface part of the power from the target board to ensure strong compatibility!
8. Support JTAG, internal FLASH, SPI FLASH and other programming modes.
9. Support WIN 2K, WIN XP, WIN7 32, WIN7 64 and other operating systems.
10, support for LSC ISPVM, LATTICE DEMIOND, LATTICE ISPEVER, and LATTICE PROGRAMMER, all these LATTICE development environments, and have actually been tested!
Pin link description:
(1) SCLK/TCK is connected to the chip’s SCLK/TCK pin.
(2) GND The public ground of the downloader and the target board is connected to the internal 2 and 4 pins. When it is used, one of the feet 2 and 4 needs to be connected to the ground of the target board.
(3) MODE/TMS is connected to the MODE/TMS pin of the chip.
(4) The GND downloader is also a common ground of the target board, and its internal 2 and 4 pins are connected. In use, it is necessary to connect one of the feet 2 and 4 to the ground of the target board.
(5) SDI/TDI is connected to the chip’s SDI/TDI pin.
(6). VCC is used to detect whether the target board connected to the downloader is powered on. It is not used to power the target board. The official downloader does not have the ability to supply power to the target board. This needs attention.
(7) SDO/TDO is connected to the SDO/TDO pin of the chip.
(8), INTI Need to connect this pin when downloading and debugging some chips, not every chip needs to be connected.
(9) TRST It is necessary to connect this pin when downloading and debugging certain chips. Not every chip needs to be connected.
(10) PROG/ispEN needs to connect this pin when downloading and debugging certain chips. Not every chip needs to be connected.
1. LATTICE USB download line body.
2. USB 2.0 high-speed link line.
3. 10pin 2.54MM pitch JTAG connection.
4. 10 with a single share of DuPont.