Description
Based on the provided product specification and pin link description, here’s a summary of the key features and components of the Lattice USB download line:
Product Specification:
- Design Quality Guarantee: Original design solution quality guarantee ensuring compatibility stability.
- Driver Installation Not Required: Direct support for Diamond/ispLever6.x/7.x/classic version, ispVM various versions.
- FPGA Support: Supports Lattice full range of FPGAs including SC/SCM/XP/XP2/EC/ECP2/ECP2M/MachXO/MachXO2 series.
- CPLD Support: Supports Lattice full range of CPLDs such as 1000/2000/4000 series.
- USB Interface: Standard USB interface using a standard USB cable to connect to a PC.
- USB Powered: USB power supply, no external power supply required.
- Compatibility: Interface power from the target board to ensure strong compatibility.
- Programming Modes: Supports JTAG, internal FLASH, SPI FLASH, and other programming modes.
- Operating System Support: Compatible with WIN 2K, WIN XP, WIN7 32, WIN7 64, and other operating systems.
- Development Environment Support: Supports LSC ISPVM, LATTICE DEMIOND, LATTICE ISPEVER, and LATTICE PROGRAMMER development environments.
Pin Link Description:
- SCLK/TCK: Connected to the chip’s SCLK/TCK pin.
- GND: Common ground of downloader and target board connected to pins 2 and 4.
- MODE/TMS: Connected to the MODE/TMS pin of the chip.
- SDI/TDI: Connected to the chip’s SDI/TDI pin.
- VCC: Used to detect if the target board is powered on, not to power the target board itself.
- SDO/TDO: Connected to the chip’s SDO/TDO pin.
- INTI, TRST, PROG/ispEN: Need to connect these pins for downloading and debugging certain chips, not every chip needs these connections.
Shipping List:
- Lattice USB download line body.
- USB 2.0 high-speed link line.
- 10-pin 2.54MM pitch JTAG connection.
- 10 with a single share of DuPont.
This comprehensive package includes everything needed for programming and debugging Lattice FPGAs and CPLDs.
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